Complete Dual-Band
Quadrature Transmitters
16   ______________________________________________________________________________________
Table 3. Configuration Register (CONFIG)
BIT
LOCATION
(0 = LSB)
POWER-UP
STATE
Determines output mode for LOCK detector pin as follows:
00 = test mode, LD_MODE cannot be 00 for normal operation
01 = IF PLL lock detector
10 = RF PLL lock detector
11 = logical AND of IF PLL and RF PLL lock detectors
1, 0
11
LD_MODE
Works in conjunction with RCP_TURBO1 (OPCTRL register) to set the turbo-
charge current mode. (See Table 7).
2
1
RCP_TURBO2
1 activates turbocharge feature, providing an additional IF charge-pump cur-
rent during frequency acquisition.
3
1
IF_TURBO_
CHARGE
RF phase-detector polarity; 1 selects positive polarity (increasing tuning voltage
on the VCO produces increasing frequency); 0 selects negative polarity
(increasing voltage on the VCO produces decreasing frequency).
4
1
RF_PD_POL
IF phase-detector polarity; 1 selects positive polarity (increasing tuning voltage
on the VCO produces increasing frequency); 0 selects negative polarity
(increasing tuning voltage on the VCO produces decreasing frequency).
5
1
IF_PD_POL
7, 6
12
11
10
9, 8
13
14
15
A 2-bit register sets the RF charge-pump current as follows:
00 = 325礎
01 = 650礎
10 = 738礎
11 = 1063礎
00
RCP
1 selects 200mV
RMS
input mode; 0 selects 100mV
RMS
input mode.
1
IQ_LEVEL
1 selects ? on IFLO port; 0 bypasses the divider.
0
BUF_DIV
1 bypasses IF VCO and enables a buffered input for external VCO use.
0
VCO_BYPASS
A 2-bit register sets the IF charge-pump current as follows:
00 = 139礎
01 = 192礎
10 = 278礎
11 = 390礎
00
ICP
0 for normal operation, 1 turns off the bias current to RFH0 output driver.
0
ZERO_BIAS
0 shuts down the RF PLL. This mode is used with an external RF PLL.
1
RF_PLL_
SHDN
0 shuts down the IF PLL. This mode is used with an external IF PLL.
1
IF_PLL_SHDN
FUNCTION
BIT NAME
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